CAN: Fix CAN-FD bitrate switch

[stephan-thiele]

This PR builds on #131. Please do not review or merge, until #131 has been merged!

Summary

In this PR, CAN-FD bitrate switch decoding and annotion appearance are fixed.

In order to do this, the following steps have been done (More details below):

• Add "FD Sample Point (%)" option, as FD fast rate has it's own sample point. Currently only the nominal sample point can be set and the same value is also used for FD bitrate.
• Bitrate switch handling is done properly by defining forced DOM edge to correct location.
• Annotation appearance of BRS bit and CRC-Delimiter (On FD-Frames) are fixed.

Current issues

Currently bitrate switch for CAN-FD is not decoded properly which may break decoding under certain circumstances. Also the annotation of BRS bit and CRC delimiter bit are not correct.

For the following images, the following settings were used:

Nominal bitrate: 1M
Nominal sample point: 75%
FD bitrate: 2M
FD sample point: 80%
Extended frame: No
BRS: Yes
11898-1 ISO-mode: On
ID: 0x42
Length: 8 bytes
Data is counting up from 0x00 to 0x07

BRS annotation has a gap and overlaps with next bit, if a nominal sample point of decoder is set to 75%:

After fix:

CRC delimiter Annotation looks okayish but is incorrect (Gap to ACK slot should be around 160ns instead):

After fix:

Decoding breaks, if ESI bit is set (DLC should be 8):

After fix:

Decoding breaks, if ACK slot is not set:

After fix (Error frames are not decoded yet, but that's another issue):

The fixes

Annotation

On CAN-FD, the bitrate is switched to FD bitrate at the sample point of BRS bit and switched back to nominal bitrate the sample point of CRC-Delimiter.

In the following example:

• Nominal bitrate is 1Mbit/s with a sample point of 75%
• FD bitrate is 2Mbit/s with a sample point of 80%
• Sample rate of logic analyzer is 100Mhz.

The current annotation just uses the FD bitrate and the sample point of the nominal bitrate, which makes the annotation too small and, if the nominal sample point and FD sample point differ, slightly overlapping. The correct way is to calculate the combined bit length from nominal and FD phase is as follows:

Bit widths for nominal and FD bitrates are:

• 100 Mhz / 1Mbit/s -> 100 samples per bit
• 100 Mhz / 2Mbit/s -> 50 samples per bit

Total bit width of BRS bit: 100 samples/bit * 0.75 + 50 samples/bit * 0.20 -> 85 samples.

For this task, the new annotation function putx_brs is introduced.

Decoding

Currently, when the bitrate is switched at the sample point, the sample point is defined as a dom edge, which leads to wrong decoding behaviour, as the effective sample point is wrong until another dom edge has been reached and leads to proper resynchonization. Thus, the fix of this PR simply defines the end of the bit, where birate is switched, as dom edge (forced DOM edge), regardless if it is a falling or rising edge. That way sampling is properly adjusted to new bitrate.