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Add Sipeed SLogic Analyzer Driver Support #275

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5f4bad3
sipeed-slogic-analyzer: Initial driver skeleton.
taonyx Jan 29, 2023
67a99e8
protocol: Adjust transfer duration and tolerance settings for improve…
taonyx Sep 5, 2025
afd1dc7
protocol: Refactor slogic_model structure for improved clarity and co…
taonyx Sep 8, 2025
286b04f
protocol: Update SLogic 16U3 sample rates and limits for accuracy
taonyx Sep 10, 2025
19826e6
protocol: Update voltage threshold for improved accuracy in scan func…
taonyx Sep 18, 2025
46feb47
protocol: Update SLogic 16U3 sample rates and voltage threshold for a…
taonyx Sep 25, 2025
b4cf97f
protocol: Fix condition (wait for trigger) for sample acquisition in …
taonyx Dec 8, 2025
87e533d
fix: ensure data are fully handled before be triggered
taonyx Dec 10, 2025
cb9fa2a
fix: drop 2 samples for hardware BUG and ensure pre_samples to be sent
taonyx Dec 12, 2025
9d53668
fix: Update limit sample rates for SLogic 16U3 based on platform
taonyx Dec 12, 2025
4a15246
fix: Update sample drop size for hardware bug workaround
taonyx Dec 12, 2025
d697201
std: add std_i32_idx()
Mixaill Dec 14, 2025
4a2b319
sipeed-slogic-analyzer: fix missing function return value
Mixaill Dec 14, 2025
9db2ea0
sipeed-slogic-analyzer: rename pattern modes
Mixaill Dec 14, 2025
5fe0cfd
sipeed-slogic-analyzer: fix initial threshold voltage value
Mixaill Dec 14, 2025
f987d57
sipeed-slogic-analyzer: update sampling channels based on current ones
Mixaill Dec 14, 2025
b94a558
sipeed-slogic-analyzer: switch from SR_CONF_BUFFERSIZE to SR_CONF_NUM…
Mixaill Dec 14, 2025
6f67688
sipeed-slogic-analyzer: fix timeout judgement, use expected rate for …
taonyx Dec 17, 2025
0ce0720
Merge pull request #2 from taorye/slogic-dev
taonyx Dec 17, 2025
43f554d
fix: SWIG 4.4+ compatibility
aisuneko Feb 26, 2026
c9c25f9
ci: update PKGBUILD for Arch AUR
aisuneko Feb 26, 2026
4e358ae
Merge pull request #3 from aisuneko/slogic-dev
taonyx Mar 3, 2026
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6 changes: 6 additions & 0 deletions Makefile.am
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Original file line number Diff line number Diff line change
Expand Up @@ -701,6 +701,12 @@ src_libdrivers_la_SOURCES += \
src/hardware/siglent-sds/protocol.c \
src/hardware/siglent-sds/api.c
endif
if HW_SIPEED_SLOGIC_ANALYZER
src_libdrivers_la_SOURCES += \
src/hardware/sipeed-slogic-analyzer/protocol.h \
src/hardware/sipeed-slogic-analyzer/protocol.c \
src/hardware/sipeed-slogic-analyzer/api.c
endif
if HW_SYSCLK_LWLA
src_libdrivers_la_SOURCES += \
src/hardware/sysclk-lwla/lwla.h \
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1 change: 1 addition & 0 deletions configure.ac
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Expand Up @@ -385,6 +385,7 @@ SR_DRIVER([serial DMM], [serial-dmm], [serial_comm])
SR_DRIVER([serial LCR], [serial-lcr], [serial_comm])
SR_DRIVER([SIGLENT SDL10x0], [siglent-sdl10x0])
SR_DRIVER([Siglent SDS], [siglent-sds])
SR_DRIVER([Sipeed Slogic Analyzer], [sipeed-slogic-analyzer], [libusb])
SR_DRIVER([Sysclk LWLA], [sysclk-lwla], [libusb])
SR_DRIVER([Sysclk SLA5032], [sysclk-sla5032], [libusb])
SR_DRIVER([Teleinfo], [teleinfo], [serial_comm])
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7 changes: 7 additions & 0 deletions contrib/60-libsigrok.rules
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Original file line number Diff line number Diff line change
Expand Up @@ -307,6 +307,13 @@ ATTRS{idVendor}=="1d50", ATTRS{idProduct}=="608e", ENV{ID_SIGROK}="1"
# sigrok usb-c-grok
ATTRS{idVendor}=="1d50", ATTRS{idProduct}=="608f", ENV{ID_SIGROK}="1"


# Sipeed(359f) Slogic series
# 0300: Slogic Lite 8
# 3031: Slogic Basic 16 U3
ATTRS{idVendor}=="359f", ATTRS{idProduct}=="0300", ENV{ID_SIGROK}="1"
ATTRS{idVendor}=="359f", ATTRS{idProduct}=="3031", ENV{ID_SIGROK}="1"

# SiLabs CP210x (USB CDC) UART bridge, used (among others) in:
# CEM DT-8852
# Manson HCS-3202
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