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add Binary-Blobs and Maintainers-and-Testers pages #210
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@@ -26,11 +26,14 @@ Intel | |
| - xxx0: [gm45 bridge, Montevina: no FSP, no ME: X200, T400, T500, R500, X300](https://doc.coreboot.org/mainboard/lenovo/montevina_series.html) : **no QubesOS support there** (no proper vt-d2) | ||
| - [xx20](https://doc.coreboot.org/mainboard/lenovo/x2xx_series.html): [Sandy bridge, no FSP. ME<10: BUP module required only: X220/T420/T520](https://doc.coreboot.org/mainboard/lenovo/Sandy_Bridge_series.html) | ||
| - xx30: [Ivy bridge, no FSP. ME<10: ROMP and BUP required: X230/T430/W530](https://doc.coreboot.org/mainboard/lenovo/Ivy_Bridge_series.html) Z220 CMT and others | ||
| - xx40: [Haswell, no FSP, ME<10: ROMP and BUP required: t440p w541 without MRC blob (upsteam docs outdated)](https://doc.coreboot.org/northbridge/intel/haswell/index.html) | ||
| - NRI was merged in upstream 25.03 and under [Heads 25.09 coreboot version bump](https://github.com/linuxboot/heads/pull/2025) | ||
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| Additional required Intel blobs: | ||
| ===== | ||
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| - [FSP is present in all Broadwell+ platforms](https://doc.coreboot.org/soc/intel/fsp/index.html) | ||
| - [MRC blob present in all Broadwell+ plaforms](https://doc.coreboot.org/soc/intel/broadwell/blobs.html) | ||
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Author
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. MRC is included in the FSP after Broadwell if I am not mistaken?! So why mention it explicitly here? Also: does Heads even have any Broadwell boards? I have no good overview...
Collaborator
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Broadwell platforms depend on MRC blob: This is why I added Broadwell is generation on which FSP was introduced, as referred by We can see arrival of FSP-M, but this is FSP first gen. Maybe we should say: @gaspar-ilom thoughts?
Collaborator
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Not for now, no. But those timeline hints are general guidelines for blobs presence, just like previously it was said that MRC blob was needed for Haswell+ before Heads included some, first with MRC blobs and then without. Same could happen with Broadwell, which is next platform for MRC blob presence. Post Broadwell; FSP (f/m/p) are present and can be seen referred in coreboot configs and coreboot/fork trees. |
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gaspar-ilom marked this conversation as resolved.
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| ME status on different boards models | ||
| ===== | ||
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