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0aec7f0
Check-in core benchmarking code
fpjentzsch Jan 29, 2025
cc61f00
Pull in new Transformer flow
fpjentzsch Jan 29, 2025
47cb5ac
Fix imports
fpjentzsch Jan 29, 2025
cb71529
Fix imports
fpjentzsch Jan 29, 2025
7d8a5f1
Add convformer, workaround streamlining
fpjentzsch Jan 29, 2025
51a5fdf
Combine test and benchmark CI defs
fpjentzsch Jan 29, 2025
35e9425
Merge branch 'dev' into ci_benchmarking
fpjentzsch Jan 29, 2025
941984e
Refactor DUTs
fpjentzsch Jan 30, 2025
f6d196b
Fix bench class lookup
fpjentzsch Jan 30, 2025
c6ae70f
Fix cfgs
fpjentzsch Jan 30, 2025
3d4e7a6
Fix misc
fpjentzsch Jan 30, 2025
a5bd7ab
Unify fifosizing settings
fpjentzsch Jan 30, 2025
e6998fb
Use correct Singularity image for benchmarks
fpjentzsch Jan 30, 2025
be19a1a
Select Singularity image in child pipeline
fpjentzsch Jan 30, 2025
5db60fa
Fix img
fpjentzsch Jan 30, 2025
9817609
Try fix for Transformer streamlining
fpjentzsch Jan 31, 2025
dbeb3a0
Display .sif file name
fpjentzsch Jan 31, 2025
c4dbd34
Disable fifo reduction testing for big models
fpjentzsch Jan 31, 2025
349995f
Try 2nd streamlining fix
fpjentzsch Jan 31, 2025
139c624
ResNet disable inferdatalayouts
fpjentzsch Jan 31, 2025
358a2c6
Use dotenv artifact
fpjentzsch Jan 31, 2025
cda98a6
Try without optional
fpjentzsch Jan 31, 2025
91da4f5
Try optional again
fpjentzsch Jan 31, 2025
0b92591
Workaround optional artifact
fpjentzsch Jan 31, 2025
b7145aa
Revert RN-50 removal of inferdatalayouts
fpjentzsch Feb 2, 2025
503f73e
Sweep over fifosim n
fpjentzsch Feb 2, 2025
2c0903d
Log partial results in failure
fpjentzsch Feb 2, 2025
9d71a4a
Fix typo
fpjentzsch Feb 2, 2025
6c744f8
Fifo testcase extension
fpjentzsch Feb 4, 2025
b17cc23
Missing change from merge branch
fpjentzsch Feb 5, 2025
b950895
Merge branch 'dev' into ci_benchmarking
fpjentzsch Feb 5, 2025
20274be
Merge branch 'dev' into ci_benchmarking
fpjentzsch Feb 6, 2025
7956a58
Increase stack size, NUM_WORKERS
fpjentzsch Feb 6, 2025
76a780b
Adapt transformer flow to new FINN+ dev
fpjentzsch Feb 6, 2025
81d2b3b
Merge branch 'dev' into ci_benchmarking
fpjentzsch Feb 6, 2025
e1671b2
Enable Transformer benchmarks
fpjentzsch Feb 6, 2025
2cdfd86
Add virtual HLS FIFO
fpjentzsch Feb 14, 2025
7c04eb6
Integrate instrumentation into ZynqBuild
fpjentzsch Feb 14, 2025
419e18f
Nest AXI interconnects if required
fpjentzsch Feb 19, 2025
5628ab2
Fix AXI interconnect connection
fpjentzsch Feb 19, 2025
0c57d1b
Make floorplan partitioning of AXI-lite interfaces more consistent
fpjentzsch Feb 19, 2025
684459c
Add GPIO IP for reset
fpjentzsch Feb 19, 2025
8d45488
Remove unneeded connect_bd_net
fpjentzsch Feb 20, 2025
960a7f4
Fix redundant bd_automation
fpjentzsch Feb 20, 2025
76ef35d
Remove tcl.collectionResultDisplayLimit
fpjentzsch Feb 21, 2025
9c6c3cd
Add driver for iterative live FIFO-sizing
fpjentzsch Feb 22, 2025
b394bba
Initialize DVC
fpjentzsch Feb 26, 2025
d8bc10d
fix metafi, test dvc
fpjentzsch Feb 26, 2025
4b7d614
Merge remote-tracking branch 'origin/fix/transformer' into ci_benchma…
fpjentzsch Feb 27, 2025
8324083
Fix ResNet-50 streamlining
fpjentzsch Feb 27, 2025
66a9c6e
Remove transformer debug streamlining code
fpjentzsch Feb 27, 2025
c1696d9
Enable live fifosizing option
fpjentzsch Feb 27, 2025
01d5551
Generate FIFO size report as part of step_set_fifo_depths
fpjentzsch Feb 27, 2025
3598501
Add PYNQ driver for ZYNQ platforms
fpjentzsch Feb 27, 2025
bd0517f
Merge branch 'feature/instrumentation' into feature/live_fifosizing
fpjentzsch Feb 27, 2025
f32e884
Add non-interactive driver
fpjentzsch Feb 27, 2025
a961859
Merge branch 'feature/live_fifosizing' into ci_benchmarking
fpjentzsch Feb 27, 2025
0bc6638
DVC push fix
fpjentzsch Feb 27, 2025
cd66c92
Refactor and remove old code
fpjentzsch Feb 28, 2025
6e2c379
Refactor microbenchmarks to use normal builder flow
fpjentzsch Feb 28, 2025
c19289b
Refactor artifact handling and upload of key metrics
fpjentzsch Feb 28, 2025
bd3b5de
Add basic measurement job
fpjentzsch Feb 28, 2025
8fa1483
Fixes to measurement and logging
fpjentzsch Feb 28, 2025
2a7c9c4
Minor fixes
fpjentzsch Feb 28, 2025
aa9f4e4
Fix pynq measurement issues
fpjentzsch Mar 1, 2025
f7ad385
Minor infrastructure improvements
fpjentzsch Mar 4, 2025
c73b9c1
Separate build & measure artifacts, fixes
fpjentzsch Mar 6, 2025
b70ba9e
Fix collection job import
fpjentzsch Mar 6, 2025
4853d0b
Fix util import
fpjentzsch Mar 6, 2025
0c812bc
Nested interconnects for Zynq-7000, fixes
fpjentzsch Mar 6, 2025
0bcb99c
Merge branch 'feature/instrumentation' into feature/live_fifosizing
fpjentzsch Mar 6, 2025
4bf21a2
Force disable additional AXI-lite interfaces for live FIFO sizing
fpjentzsch Mar 6, 2025
dcfa1bd
Merge branch 'feature/live_fifosizing' into ci_benchmarking
fpjentzsch Mar 6, 2025
5cc2924
Enable live fifosizing for transformer
fpjentzsch Mar 6, 2025
05f72d2
Minor fixes for Transformer flow
fpjentzsch Mar 7, 2025
230ac92
Fix clkname variable expansion
fpjentzsch Mar 7, 2025
bb19afc
Merge branch 'feature/instrumentation' into feature/live_fifosizing
fpjentzsch Mar 7, 2025
df5bc29
Merge branch 'feature/live_fifosizing' into ci_benchmarking
fpjentzsch Mar 7, 2025
8dcf182
[Driver] Reset PYNQ cache before loading overlay
fpjentzsch Mar 7, 2025
8e4a209
Add VGG-10 and MobileNetV1
fpjentzsch Mar 7, 2025
68c41b8
Fix variable named range
fpjentzsch Mar 7, 2025
9884bef
Reduce benchmark parallelism, force push exp
fpjentzsch Mar 8, 2025
ef7b8cf
Fix FIFO width export for driver
fpjentzsch Mar 8, 2025
6007d65
Merge branch 'feature/live_fifosizing' into ci_benchmarking
fpjentzsch Mar 8, 2025
4cfc32a
Transformer: disable cppsim for virtual fifosizing
fpjentzsch Mar 8, 2025
b0fb5f2
[Driver] Reset PYNQ cache before loading Overlay
fpjentzsch Mar 9, 2025
a5c37c9
Merge branch 'feature/instrumentation' into feature/live_fifosizing
fpjentzsch Mar 9, 2025
a08e2c4
[Driver] Reset PYNQ cache, fix json int keys
fpjentzsch Mar 9, 2025
4563d5d
Merge branch 'feature/live_fifosizing' into ci_benchmarking
fpjentzsch Mar 9, 2025
c0fcb10
Improve error propagation
fpjentzsch Mar 9, 2025
f8bf6e7
Zip debug artifacts
fpjentzsch Mar 11, 2025
a63b4ae
Fix MNV1 fifo step order
fpjentzsch Mar 14, 2025
622953f
Merge branch 'dev' into ci_benchmarking
fpjentzsch Mar 15, 2025
cce646d
Allow local test execution
fpjentzsch Mar 21, 2025
2c9925d
Start search for start depths from 1
fpjentzsch Mar 24, 2025
9f3e7c7
Let driver fill live FIFO sizes into complete folding config
fpjentzsch Mar 24, 2025
15c2582
Merge branch 'feature/live_fifosizing' into ci_benchmarking
fpjentzsch Mar 24, 2025
7a2ff27
Generate follow-up bench cfg for lfs experiments
fpjentzsch Mar 24, 2025
ea808b2
Fix collection of lfs-generated folding config
fpjentzsch Mar 25, 2025
15fef09
Increase virtual FIFO depth offset to 8
fpjentzsch Mar 28, 2025
bce44ea
Merge branch 'feature/live_fifosizing' into ci_benchmarking
fpjentzsch Mar 28, 2025
5e8c888
Allow IODMA wrapper
fpjentzsch Apr 8, 2025
2687ae0
Parse DCP resource breakdown
fpjentzsch Apr 8, 2025
00ec0f9
Put pipeline and run IDs in DVC exp msg
fpjentzsch Apr 8, 2025
c4f7437
Validate accuracy when synthesized with IODMA wrapper
fpjentzsch Apr 24, 2025
d0e33d0
Update gitignore
fpjentzsch Apr 24, 2025
5b45cde
Fix typo
fpjentzsch Apr 25, 2025
b5aee28
Update gitignore
fpjentzsch Apr 28, 2025
4f9dc7e
[Driver] Increase recursion limit
fpjentzsch Apr 28, 2025
b2b2374
Merge branch 'feature/live_fifosizing' into ci_benchmarking
fpjentzsch Apr 28, 2025
4699524
[Driver] Support top1 output
fpjentzsch May 6, 2025
45dd0ee
Merge branch 'dev' into ci_benchmarking
fpjentzsch May 19, 2025
215b6ca
[CI] Fix artifact pull from parent pipeline
fpjentzsch May 19, 2025
ffc9fd9
Fix make driver step name
fpjentzsch May 20, 2025
d20b10d
Move benchmarking scripts to FINN package
fpjentzsch May 20, 2025
33921b8
Fix early import
fpjentzsch May 20, 2025
a49d003
Introduce custom step library
fpjentzsch May 20, 2025
cfdb042
Switch to YAML-based build config
fpjentzsch May 20, 2025
e4df7dc
Merge branch 'dev' into feature/instrumentation
fpjentzsch May 20, 2025
7a3f928
Adapt to FINN_ROOT refactoring
fpjentzsch May 20, 2025
028bc5f
Merge branch 'feature/instrumentation' into feature/live_fifosizing
fpjentzsch May 20, 2025
ccebbdc
Fix use of deprecated FINN_ROOT
fpjentzsch May 20, 2025
6c4c3eb
Merge branch 'feature/instrumentation' into feature/live_fifosizing
fpjentzsch May 20, 2025
8e38534
Merge branch 'feature/live_fifosizing' into ci_benchmarking
fpjentzsch May 20, 2025
6511559
Fix bench cmd
fpjentzsch May 20, 2025
cf6254d
Fix CLI call
fpjentzsch May 21, 2025
cc0be94
[CI] Adapt to recent runner version change
fpjentzsch May 21, 2025
d170897
Minor fixes
fpjentzsch May 21, 2025
9106fbf
Merge branch 'feature/instrumentation' into feature/live_fifosizing
fpjentzsch May 21, 2025
35a0851
Merge branch 'feature/live_fifosizing' into ci_benchmarking
fpjentzsch May 21, 2025
9718a30
[CI] Use empty git strategy for benchmarking as well
fpjentzsch May 21, 2025
bd36b8f
Fix typo
fpjentzsch May 21, 2025
a942390
Refactor remaining MakePYNQDriver calls
fpjentzsch May 21, 2025
f1ce17d
Merge branch 'dev' into feature/instrumentation
fpjentzsch May 22, 2025
41d441b
Merge branch 'feature/instrumentation' into feature/live_fifosizing
fpjentzsch May 22, 2025
d7a5286
Merge branch 'feature/live_fifosizing' into ci_benchmarking
fpjentzsch May 22, 2025
df2d61f
Merge branch 'dev' into ci_benchmarking
fpjentzsch May 22, 2025
4ee4da1
Adapt virtual FIFO output stream naming
fpjentzsch May 22, 2025
fb18537
Move CI-specific scripts
fpjentzsch May 22, 2025
9a1682e
Move VGG10 files to dvc
fpjentzsch May 23, 2025
881432f
Fix cfg path
fpjentzsch May 23, 2025
1568af6
Move all models to dvc, refactor configs
fpjentzsch May 23, 2025
9710dff
Fix linting
fpjentzsch May 23, 2025
3a84a57
Change log level
fpjentzsch May 23, 2025
6054c6b
dvc pull before saving dvclive experiments
fpjentzsch May 23, 2025
8dd0c08
Fix report dir creation
fpjentzsch May 23, 2025
807950b
Use live FIFO sizes for MNv1, RN50
fpjentzsch May 26, 2025
94abf2c
Make console and log output more consistent
fpjentzsch May 26, 2025
9899d54
More verbose benchmarking logging
fpjentzsch May 26, 2025
83a328d
Fix paths to moved report files
fpjentzsch May 26, 2025
b8c9f74
Increase logging robustness, verbosity
fpjentzsch May 27, 2025
c6cce98
Switch RN-50 to U280
fpjentzsch May 27, 2025
dbfd955
Extend launch_process_helper and use it in more places
fpjentzsch May 27, 2025
8abf5fe
Fix build dir creation
fpjentzsch May 28, 2025
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1 change: 1 addition & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -106,3 +106,4 @@ bench_input
bench_output
bench_save
bench_work
/models
129 changes: 82 additions & 47 deletions .gitlab-ci.yml
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
include: ci/.gitlab-setup.yml

stages:
- sync
- build
Expand All @@ -17,6 +19,9 @@ variables:
CPU_CORES:
description: "Select number of CPU cores and test workers"
value: "32"
CPU_CORES_BENCH:
description: "Select number of CPU cores for benchmark runs"
value: "8"
PARALLEL_JOBS:
description: "Number of parallel Slurm array jobs per Benchmark job"
value: "1"
Expand All @@ -30,15 +35,14 @@ variables:
description: "Optional QoS option (include --qos, e.g., --qos express)"
value: ""
MANUAL_CFG_PATH:
description: "Use this config file instead of configs stored in the repo. Path must be accessible to runner"
description: "Name (in ci/cfg/) or path (relative to LOCAL_CFG_DIR) of benchmarking config to run"
value: ""

workflow:
name: '$PIPELINE_NAME'
rules:
# Run pipeline for GitHub PRs to dev or main (does not support PRs from forks)
# Run pipeline for GitHub PRs to dev (does not support PRs from forks)
- if: $CI_PIPELINE_SOURCE == "external_pull_request_event" && $CI_EXTERNAL_PULL_REQUEST_TARGET_BRANCH_NAME == "dev"
- if: $CI_PIPELINE_SOURCE == "external_pull_request_event" && $CI_EXTERNAL_PULL_REQUEST_TARGET_BRANCH_NAME == "main"
# Run pipeline for pushes to dev or main
- if: $CI_COMMIT_BRANCH == "dev" || $CI_COMMIT_BRANCH == "main"
# Run pipeline if manually triggered via API or web GUI
Expand Down Expand Up @@ -67,38 +71,6 @@ Sync finn-dev:
- git pull upstream dev
- git push origin finn-dev

.n2_setup_general: &n2_setup_general
- module load lang/Python/3.10.4-GCCcore-11.3.0
- module load devel/Autoconf/2.71-GCCcore-11.3.0
- module load lang/Bison/3.8.2-GCCcore-11.3.0
- module load lang/flex/2.6.4-GCCcore-11.3.0
- module load compiler/GCC/11.3.0
- module load lib/pybind11/2.9.2-GCCcore-11.3.0
- module load devel/Boost/1.79.0-GCC-11.3.0
- module load lib/fmt/9.1.0-GCCcore-11.3.0
- ulimit -s unlimited # Increase stack size limit

.n2_setup_xilinx_2022_2: &n2_setup_xilinx_2022_2
- module load fpga
- module load xilinx/xrt/2.14 # includes Vitis/Vivado 2022.2
# module load will set PLATFORM_REPO_PATHS to one specific platform, revert to top-level PLATFORM_PATH
- export PLATFORM_REPO_PATHS=$PLATFORM_PATH

.n2_setup_xilinx_2024_2: &n2_setup_xilinx_2024_2
- module load fpga
- module load xilinx/xrt/2.14 # includes Vitis/Vivado 2022.2
- module swap xilinx/vitis/24.2 # switch to Vitis/Vivado 2024.2
# module load will set PLATFORM_REPO_PATHS to one specific platform, revert to top-level PLATFORM_PATH
- export PLATFORM_REPO_PATHS=$PLATFORM_PATH

.setup_venv_from_whl: &setup_venv_from_whl
# Move everything to working directory (e.g., RAMdisk)
- cp -dfR . $PATH_WORKDIR
- cd $PATH_WORKDIR
# Create fresh virtual environment and install finn-plus from .whl (artifact)
- python3 -m venv finn-plus-venv
- finn-plus-venv/bin/pip install dist/*.whl

Build:
id_tokens:
CI_JOB_JWT:
Expand All @@ -113,8 +85,8 @@ Build:
# Otherwise run
- when: always
before_script:
- *n2_setup_general
- *n2_setup_xilinx_2022_2
- !reference [.n2_setup_general, before_script]
- !reference [.n2_setup_xilinx_2022_2, before_script]
# Install current version of Poetry
- python3 -m venv poetry-install
- poetry-install/bin/pip install poetry
Expand Down Expand Up @@ -151,6 +123,9 @@ FINN Test Suite 2022.2:
# Do not run if test suite has been deselected
- if: $TEST_SUITE == "none"
when: never
# Do not run for PRs to dev (run only for pushes)
- if: $CI_PIPELINE_SOURCE == "external_pull_request_event" && $CI_EXTERNAL_PULL_REQUEST_TARGET_BRANCH_NAME == "dev"
when: never
# Always run, as long as there was no prior failure
- when: on_success
cache:
Expand All @@ -159,13 +134,10 @@ FINN Test Suite 2022.2:
paths:
- deps
variables:
GIT_STRATEGY: empty # Do not pull repository, use PyPI installation instead
GIT_STRATEGY: empty # Do not pull repository, install from wheel (artifact) instead
SCHEDULER_PARAMETERS: "-A $PROJECT_ACCOUNT -p $SLURM_PARTITION -t $SLURM_TIMEOUT $SLURM_QOS --nodes 1 --ntasks 1 --cpus-per-task $CPU_CORES --exclusive"
PYTEST_PARALLEL: "$CPU_CORES"
before_script:
- *n2_setup_general
- *n2_setup_xilinx_2022_2
- *setup_venv_from_whl
extends: .setup_full_2022_2
script:
# Launch additional monitoring
- $JOB_MONITORING_DIR/monitor.sh $JOB_MONITORING_DIR/$CI_PIPELINE_ID/$HOSTNAME.log &
Expand All @@ -182,8 +154,71 @@ FINN Test Suite 2022.2:
junit: reports/*.xml

FINN Test Suite 2024.2:
extends: FINN Test Suite 2022.2
before_script:
- *n2_setup_general
- *n2_setup_xilinx_2024_2
- *setup_venv_from_whl
extends:
- FINN Test Suite 2022.2
- .setup_full_2024_2
rules:
# Do not run on a schedule
- if: $CI_PIPELINE_SOURCE == "schedule"
when: never
# Do not run if test suite has been deselected
- if: $TEST_SUITE == "none"
when: never
# Always run, as long as there was no prior failure
- when: on_success

Bench (Manual):
stage: test
rules:
# Do not run on a schedule
- if: $CI_PIPELINE_SOURCE == "schedule"
when: never
- if: $MANUAL_CFG_PATH != ""
trigger:
include: ci/.gitlab-bench.yml
strategy: depend
forward:
pipeline_variables: true
variables:
PARENT_PIPELINE_ID: $CI_PIPELINE_ID
BENCH_CFG: "manual"

Bench (Basic):
stage: test
rules:
# Do not run on a schedule
- if: $CI_PIPELINE_SOURCE == "schedule"
when: never
- if: $MANUAL_CFG_PATH == ""
trigger:
include: ci/.gitlab-bench.yml
strategy: depend
forward:
pipeline_variables: true
variables:
PARENT_PIPELINE_ID: $CI_PIPELINE_ID
parallel:
matrix:
- BENCH_CFG: [regression_basic]

Bench (Extended):
stage: test
rules:
# Do not run on a schedule
- if: $CI_PIPELINE_SOURCE == "schedule"
when: never
# Do not run for PRs to dev (run only for pushes)
- if: $CI_PIPELINE_SOURCE == "external_pull_request_event" && $CI_EXTERNAL_PULL_REQUEST_TARGET_BRANCH_NAME == "dev"
when: never
- if: $MANUAL_CFG_PATH == ""
trigger:
include: ci/.gitlab-bench.yml
strategy: depend
forward:
pipeline_variables: true
variables:
PARENT_PIPELINE_ID: $CI_PIPELINE_ID
PARALLEL_JOBS: "4"
parallel:
matrix:
- BENCH_CFG: [regression_extended, microbenchmark_basic]
1 change: 1 addition & 0 deletions .pre-commit-config.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,7 @@ repos:
- id: check-merge-conflict
- id: check-xml
- id: check-yaml
args: ['--unsafe']
- id: debug-statements
exclude: '^src/finn/builder/build_dataflow.py$'
- id: end-of-file-fixer
Expand Down
81 changes: 81 additions & 0 deletions ci/.gitlab-bench.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,81 @@
include: ci/.gitlab-setup.yml

stages:
- build
- measure
- collect

variables:
BENCH_CFG:
description: "Select config, usually provided by parent pipeline"
value: ""

workflow:
name: "bench_$BENCH_CFG"

FINN Build:
id_tokens:
CI_JOB_JWT:
aud: https://git.uni-paderborn.de
stage: build
needs:
- job: Build
pipeline: $PARENT_PIPELINE_ID
variables:
SCHEDULER_PARAMETERS: "-A $PROJECT_ACCOUNT -p $SLURM_PARTITION -t $SLURM_TIMEOUT $SLURM_QOS --nodes 1 --ntasks 1 --cpus-per-task $CPU_CORES_BENCH --exclusive --array 0-$( expr $PARALLEL_JOBS - 1 )"
NUM_DEFAULT_WORKERS: "$CPU_CORES_BENCH"
extends: .setup_full_2022_2
script:
# Launch additional monitoring
- $JOB_MONITORING_DIR/monitor.sh $JOB_MONITORING_DIR/$CI_PIPELINE_ID/$HOSTNAME.log &
# Launch benchmarking script via FINN CLI, includes deps update and environment preparation
# TODO: cache dvc pull
- |
source finn-plus-venv/bin/activate
dvc pull
finn bench --dependency-path ./deps --build-path $FINN_BUILD_DIR --num-workers $CPU_CORES_BENCH --bench_config $BENCH_CFG
cache:
key: $CI_COMMIT_SHA
policy: pull
paths:
- deps
artifacts:
name: "build_artifacts"
when: always
paths:
- build_artifacts/

Measurement:
id_tokens:
CI_JOB_JWT:
aud: https://git.uni-paderborn.de
stage: measure
tags:
- board
rules:
# Also run on failure of previous tasks to measure partial results
- when: always
script:
# Run as root and activate the PYNQ venv manually to use PYNQ outside of the typical Jupyter environment
- sudo bash -c "source /etc/profile.d/pynq_venv.sh && export XILINX_XRT=/usr && python ci/measure.py"
artifacts:
name: "measurement_artifacts"
when: always
paths:
- measurement_artifacts/

Result Collection:
id_tokens:
CI_JOB_JWT:
aud: https://git.uni-paderborn.de
stage: collect
tags:
- image_build
rules:
# Also run on failure of previous tasks to collect partial results
- when: always
script:
# pulling models seems to be needed for dvclive to save experiments, even though they are not used or modified
- dvc pull
- python3.10 ci/collect.py
- dvc exp push -f -j 4 -r push git@github.com:eki-project/finn-plus.git
49 changes: 49 additions & 0 deletions ci/.gitlab-setup.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,49 @@
# This file defines some basic scripts used to setup the FINN environment on the runner

.n2_setup_general:
before_script:
- module load lang/Python/3.10.4-GCCcore-11.3.0
- module load devel/Autoconf/2.71-GCCcore-11.3.0
- module load lang/Bison/3.8.2-GCCcore-11.3.0
- module load lang/flex/2.6.4-GCCcore-11.3.0
- module load compiler/GCC/11.3.0
- module load lib/pybind11/2.9.2-GCCcore-11.3.0
- module load devel/Boost/1.79.0-GCC-11.3.0
- module load lib/fmt/9.1.0-GCCcore-11.3.0
- ulimit -s unlimited # Increase stack size limit

.n2_setup_xilinx_2022_2:
before_script:
- module load fpga
- module load xilinx/xrt/2.14 # includes Vitis/Vivado 2022.2
# module load will set PLATFORM_REPO_PATHS to one specific platform, revert to top-level PLATFORM_PATH
- export PLATFORM_REPO_PATHS=$PLATFORM_PATH

.n2_setup_xilinx_2024_2:
before_script:
- module load fpga
- module load xilinx/xrt/2.14 # includes Vitis/Vivado 2022.2
- module swap xilinx/vitis/24.2 # switch to Vitis/Vivado 2024.2
# module load will set PLATFORM_REPO_PATHS to one specific platform, revert to top-level PLATFORM_PATH
- export PLATFORM_REPO_PATHS=$PLATFORM_PATH

.setup_venv_from_whl:
before_script:
# Move everything to working directory (e.g., RAMdisk)
- cp -dfR . $PATH_WORKDIR
- cd $PATH_WORKDIR
# Create fresh virtual environment and install finn-plus from .whl (artifact)
- python3 -m venv finn-plus-venv
- finn-plus-venv/bin/pip install dist/*.whl

.setup_full_2022_2:
before_script:
- !reference [.n2_setup_general, before_script]
- !reference [.n2_setup_xilinx_2022_2, before_script]
- !reference [.setup_venv_from_whl, before_script]

.setup_full_2024_2:
before_script:
- !reference [.n2_setup_general, before_script]
- !reference [.n2_setup_xilinx_2024_2, before_script]
- !reference [.setup_venv_from_whl, before_script]
50 changes: 50 additions & 0 deletions ci/cfg/live_fifosizing.yml
Original file line number Diff line number Diff line change
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[
# Real models
{
"dut": ["vgg10"],
"live_fifo_sizing": [True],
"generate_outputs": [["bitfile", "pynq_driver", "deployment_package"]]
},
{
"dut": ["mobilenetv1"],
"live_fifo_sizing": [True],
"generate_outputs": [["bitfile", "pynq_driver", "deployment_package"]]
},
{
"dut": ["resnet50"],
"live_fifo_sizing": [True],
"generate_outputs": [["bitfile", "pynq_driver", "deployment_package"]]
},

# Synthetic non-linear models
{
"dut": ["synthetic_nonlinear"],
"dim": [64],
"kernel_size": [5],
"ch": [8],
"simd": [8],
"pe": [8],
"parallel_window": [1],

"lb_num_layers": [1],
"rb_num_layers": [4, 8, 16],

"live_fifo_sizing": [True],
"generate_outputs": [["bitfile", "pynq_driver", "deployment_package"]]
},
{
"dut": ["synthetic_nonlinear"],
"dim": [64],
"kernel_size": [5],
"ch": [8],
"simd": [1],
"pe": [1],
"parallel_window": [0],

"lb_num_layers": [1],
"rb_num_layers": [4, 8, 16],

"live_fifo_sizing": [True],
"generate_outputs": [["bitfile", "pynq_driver", "deployment_package"]]
}
]
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