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Compressed cleanup#1024

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kgugala merged 2 commits intochipsalliance:masterfrom
SamuelRiedel:compressed-cleanup
Mar 23, 2026
Merged

Compressed cleanup#1024
kgugala merged 2 commits intochipsalliance:masterfrom
SamuelRiedel:compressed-cleanup

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@SamuelRiedel
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@SamuelRiedel SamuelRiedel commented Dec 18, 2025

This is a small PR cleaning up some of the compressed instructions that potentially have rs1 == rd. Previously, in this case, rd was unset and whenever we randomized instructions, special care was taken to not have rs1 within the reserved_rd registers. This simplifies this logic a bit by simply constraining rs1 == rd.

Furthermore, it introduces a update_excluded_instr function that can be used to determine which instructions cannot be inserted with the given reserved registers. This function can be reused across test classes.

This cleanup is useful to simplify implementing the Zcb #1025 and Zcmp #1026 extensions that we use in Ibex's verification.

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@kgugala @tmichalak @hcallahan-lowrisc If you have time, I would appreciate it if you could have a look at this PR and the ones building on it.

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@mcockrell-google @kgugala @tmichalak, sorry for pinging you again. I am not sure whether you are the maintainers of this repo, but I noticed that you were most active here lately. Would you be interested in having the Zcb and Zcmp extensions added upstream? If so, I'd appreciate your review on this and the following PRs whenever you have a moment:

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LGTM

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looks good

@kgugala kgugala merged commit 9e4aab7 into chipsalliance:master Mar 23, 2026
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3 participants