add parity to uart verification component #1181
add parity to uart verification component #1181rafaelnp wants to merge 5 commits intoVUnit:masterfrom
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LarsAsplund
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I haven't reviewed the updates to the examples. I will wait for the other comments to be sorted out.
| type uart_master_t is record | ||
| p_actor : actor_t; | ||
| p_baud_rate : natural; | ||
| p_parity : natural; |
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Create an enumerated type parity_t for this.
| uart_slave : uart_slave_t; | ||
| baud_rate : natural); | ||
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| -- 0 = no parity, 1 = odd parity, 2 = even parity |
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These are suitable names for the values of parity_t.
| constant default_parity : natural := 0; | ||
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| impure function new_uart_master(initial_baud_rate : natural := default_baud_rate; | ||
| initial_parity : natural := default_parity; |
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Add new parameters to the end to avoid breaking existing implementations.
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| constant uart_set_baud_rate_msg : msg_type_t := new_msg_type("uart set baud rate"); | ||
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| constant uart_set_parity_msg : msg_type_t := new_msg_type("uart set parity rate"); |
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No "rate" in the message name.
| constant default_baud_rate : natural := 115200; | ||
| constant default_idle_state : std_logic := '1'; | ||
| constant default_data_length : positive := 8; | ||
| constant default_parity : natural := 0; |
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Better to use the no_parity enum directly.
| severity error; | ||
| end if; | ||
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| push(msg, parity); |
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Push parity_t'pos(parity)
| baud_rate <= pop(msg); | ||
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| elsif msg_type = uart_set_parity_msg then | ||
| parity <= pop(msg); |
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Here you will have to convert the received value back to parity_t using the 'val attribute
| wait for time_per_bit; | ||
| end loop; | ||
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| if parity = 1 then |
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Much of the code in the if statement branches is identical and be placed outside of the if statement to reduce code duplication.
| wait for 0 ns; | ||
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| if parity_bit /= parity_calc then | ||
| report "odd parity mismatch" |
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A warning report will not cause a test case to fail by default. An error report will fail but is not testable (you need a test in tb_uart to verify that parity errors are detected). What you need is VUnit check procedures that can be mocked. Have a look at
I would also add a pop procedure that returns both data and a parity error boolean such that the user can decide what to do with an error. This is not supported by the stream interface so the UART VC needs to support a "UART stream" interface as well. Have a look at how the AXI stream VCs supports both the basic stream interface and an AXI stream interface:
| test_baud_rate(2000); | ||
| test_baud_rate(7000); | ||
| test_baud_rate(200000); | ||
| elsif run("test_parity_odd") then |
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A test case verifying parity error detection is needed.
Add parity support to uart verification component and extend the testbenches (VC and example) accordingly, and verified with the following simulators: