Releases: MicrochipTech/veryVerilog
Releases · MicrochipTech/veryVerilog
v1.6
Release Notes
Version 1.6
New Features and Enhancements
- Hyperlinks Added: Relevant material now includes hyperlinks for easier navigation. [Commit: de4347c]
- Image Inclusion: Added an image of the PIC16F13145 connected to the system for better visualization. [Commit: 3df1da0]
- Readme Addition: A comprehensive README has been added to the PCB section to enhance documentation. [Commit: ac1cc12]
Bug Fixes
- Table Misalignment: Fixed misalignment issues in table layouts to improve readability. [Commit: fcc9346]
PCB Updates
- PCB v3 Sources: Released gerbers and schematics for PCB version 3.0, providing updated design files. [Commit: 66eaddd]
- Version 2 Sources: Included sources and gerbers for version 2, ensuring all design files are up-to-date. [Commit: adcdf5e]
- Additional PCB Sources: Added more PCB sources for version 3.0 to support ongoing development. [Commit: 0feb70a]
Merged Pull Requests
- Issue #30: Addressed and closed issue #30 with the addition of hyperlinks. [Commit: de4347c]
- Issue #27: Resolved issue #27 by adding a README to the PCB section. [Commit: ac1cc12]
- Issue #26: Completed issue #26 with the release of PCB v3 sources. [Commit: 66eaddd]
We appreciate the contributions from all team members and community participants.
Your feedback is invaluable in making this project better.
Please continue to report any issues and suggest improvements
v0.1.5
Release Notes
Version 0.1.5
New Features
- Verify Flag in Class: Introduced a new feature to set a verify flag within the class, enhancing the ability to confirm the integrity of operations.
Enhancements
- Disconnect Event Handling: Improved handling of disconnect events (Issue #23) to ensure more robust communication and error management during device interactions.
- Flash Verification Post-Programming: Implemented a verification process for flash memory after programming to ensure that the data written is accurate and reliable.
- Refactored PIC Classes: Refactored the PIC classes for better code organization, maintainability, and performance. This change aims to streamline the codebase and improve overall efficiency.
- Verification Implementation: Added comprehensive verification mechanisms to ensure that all operations are validated, enhancing the reliability of the system.
Version Increment
- Version Increased: The version has been incremented to reflect the addition of new features and enhancements.
Notes
- Users are encouraged to review the changes and test the new features to ensure compatibility with existing systems. Feedback is welcome to further improve functionality.