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Releases: MicrochipTech/fpga-hls-examples

2025.2.1

17 Apr 11:35

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2025.2.1 Pre-release
Pre-release

fpga-hls-examples 2025.2.1

Changes since last release (v2025.2)

  • New Example: SmartHLS Coding Assistant with Claude Code. This includes the following sample prompts:
    • Vector addition
    • Alpha blend
    • Polar-to-Cartesian and Cartesian-to-Polar coordinate conversion
    • SHA256
    • Sobel filter optimization

2025.2

14 Jan 23:25
9696327

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fpga-hls-examples 2025.2

Changes since last release (v2025.1)

Fixed Issues:

For the auto instrumentation example:

  • If run using Windows, you should not see the error "Error: can't read "merged_file": no such variable" when running C:\Microchip\Libero_SoC_2025.1\SmartHLS\SmartHLS\examples\scripts\utils\instrument\update_vcd.tcl

  • If run on Windows or Linux, Modelsim no longer displays the error message saying "....clken" signals were not found when running C:\Microchip\Libero_SoC_2025.1\SmartHLS\SmartHLS\lib\python\instrumentation\read_vcd.py.

Known Issues:

For the auto-instrumentation example:

  • While running Section 2: Monitoring Mode with ModelSim, if the board you are running the example on is not connected to the build host, you may need to manually load the activation created in the previous section. To do so, in hls_output/scripts/instrument/monitor.tcl, you will need to load the activation yourself before sourcing the monitoring script. Full details on how to do this are in auto-instrument/readme.md. This is an issue with Identify and may be fixed in the next version of Libero.

Other changes:

  • Replaced legup.tcl with shls.tcl. This change is only compatible with SmartHLS 2025.2 or newer.

  • In all Makefiles, replaced “legup-config” with “shls-config”. This change is only compatible with SmartHLS 2025.2 or newer.

  • Removed Makefile.common inclusion from all Makefiles. This change is only compatible with SmartHLS 2024.2 or newer.

  • Updated source code and documentation for trainings to compile with Libero/SmartHLS 2025.2.

  • Included pre-generated .job files for trainings compiled with Libero 2025.2, and are available as release assets.

2025.1

03 Jul 18:46
ed32657

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fpga-hls-examples 2025.1

Changes since last release (v2024.1)

• Added SHLS examples to demonstrate Error Correction Code and Automatic On-Chip Instrumentation functionality
• (Canny RISC-V) Added an example demonstrating how to design an SHLS module with input and output FIFOs in a RISC-V environment
• Updated source code and documentation for trainings to compile with Libero/SmartHLS 2025.1
• Included pre-generated .job files for trainings compiled with Libero 2025.1
• Moved LFS files to Release Assets

Known Issues:

  • For the auto instrumentation example:
    • If run using Windows, you may see the error "Error: can't read "merged_file": no such variable". To fix this, open C:\Microchip\Libero_SoC_2025.1\SmartHLS\SmartHLS\examples\scripts\utils\instrument\update_vcd.tcl. On line 198, change "$merged_file" to "$vcdFile".
    • If run on Windows or Linux, Modelsim may display the error message saying "....clken" signals were not found. To solve this issue, go to line 257 of C:\Microchip\Libero_SoC_2025.1\SmartHLS\SmartHLS\lib\python\instrumentation\read_vcd.py and change "clk" to "clk$".
    • These issues will be addressed in the next release of Libero.

2023.2

11 Sep 19:41
0cb286f

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  • Updated Training documents for SmartHLS 2023.2
  • Added examples of the SmartHLS dataflow feature into Trainings 1 and 2
  • Added a 4th training covering the SmartHLS PolarFire SoC flow. Targets either the Icicle kit reference design or a custom design.