diff --git a/source/hw-spec/controller/addresses.rst b/source/hw-spec/controller/addresses.rst
index d935566..460f85a 100644
--- a/source/hw-spec/controller/addresses.rst
+++ b/source/hw-spec/controller/addresses.rst
@@ -88,7 +88,8 @@ controller.
   configurations that support hardware synchronization, resetting the
   acquisition counter through ``ACQ_CNT_RESET`` on a device with a
   ``SYNC_HW_ADDR`` of 0x00000000 will broadcast a hardware signal to all
-  connected non-zero controllers, resetting all counters simultaneously.
+  connected non-zero addressed controllers, resetting all counters
+  simultaneously.
 
   .. note:: Hardware synchronization is guaranteed only among controllers with
     the same hardware implementation and that indicate support for this
diff --git a/source/hw-spec/controller/channels/index.rst b/source/hw-spec/controller/channels/index.rst
index 17fa82d..a7db7e8 100644
--- a/source/hw-spec/controller/channels/index.rst
+++ b/source/hw-spec/controller/channels/index.rst
@@ -8,7 +8,7 @@ abstract communication channels:
 #. :ref:`data-rd-chan`: Read-only, high-bandwidth stream of device output
    :ref:`frames<frame>` from controller to host.
 #. :ref:`data-wr-chan`: Write-only, high-bandwidth stream of device input
-   :ref:`frames<frame>` from mhost to controller.
+   :ref:`frames<frame>` from host to controller.
 #. :ref:`sig-chan`: Read-only stream of short-messages and asynchronous hardware
    events from controller to host.
 #. :ref:`conf-chan`: Bidirectional, addressed access to device registers.