diff --git a/syn/python/get_kge.py b/syn/python/get_kge.py
index c0cb937a12..f194a72255 100755
--- a/syn/python/get_kge.py
+++ b/syn/python/get_kge.py
@@ -49,15 +49,17 @@ def get_kge(report_path, weighted_dict):
     ge = 0.0
     for line_idx, line in enumerate(report):
         data = line.split()
-        if not data:
+        if len(data) < 3:
             continue
-        weight = weighted_dict.get(data[0])
+        cell_name = data[2]
+        weight = weighted_dict.get(cell_name)
         if weight is not None:
             try:
-                ge += float(data[1]) * weight
+                count = float(data[0])
+                ge += count * weight
             except (IndexError, ValueError):
                 raise RuntimeError('{}:{} Cell {} matched but was misformatted'
-                                   .format(report_path, line_idx + 1, data[0]))
+                                   .format(report_path, line_idx + 1, cell_name))
     print("Area in kGE = ", round(ge/1000, 2))
 
 
@@ -77,4 +79,4 @@ def main():
 
 
 if __name__ == "__main__":
-    main()
+    main()
\ No newline at end of file
diff --git a/syn/syn_yosys.sh b/syn/syn_yosys.sh
index cca9e7644f..d88782bcfc 100755
--- a/syn/syn_yosys.sh
+++ b/syn/syn_yosys.sh
@@ -40,10 +40,10 @@ LR_DEP_SOURCES=(
     "../vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_dec.sv"
     "../vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_enc.sv"
     "../vendor/lowrisc_ip/ip/prim/rtl/prim_lfsr.sv"
-    "../vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_and2.sv"
-    "../vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_buf.sv"
-    "../vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_clock_mux2.sv"
-    "../vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_flop.sv"
+    "../vendor/lowrisc_ip/ip/prim_generic/rtl/prim_and2.sv"
+    "../vendor/lowrisc_ip/ip/prim_generic/rtl/prim_buf.sv"
+    "../vendor/lowrisc_ip/ip/prim_generic/rtl/prim_clock_mux2.sv"
+    "../vendor/lowrisc_ip/ip/prim_generic/rtl/prim_flop.sv"
 )
 
 mkdir -p "$LR_SYNTH_OUT_DIR/generated"
@@ -78,10 +78,15 @@ for file in ../rtl/*.sv; do
       continue
   fi
 
+  # Skip tracer (not needed for synthesis)
+  if [ "$module" = "ibex_tracer" ]; then
+      continue
+  fi
+
   sv2v \
     --define=SYNTHESIS --define=YOSYS \
     ../rtl/*_pkg.sv \
-    ../vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_pkg.sv \
+    ../vendor/lowrisc_ip/ip/prim_generic/rtl/prim_ram_1p_pkg.sv \
     ../vendor/lowrisc_ip/ip/prim/rtl/prim_secded_pkg.sv \
     -I../vendor/lowrisc_ip/ip/prim/rtl \
     -I../vendor/lowrisc_ip/dv/sv/dv_utils \
@@ -96,9 +101,6 @@ for file in ../rtl/*.sv; do
   sed -i 's/prim_flop/prim_generic_flop/g' "$LR_SYNTH_OUT_DIR"/generated/"${module}".v
 done
 
-# remove tracer (not needed for synthesis)
-rm -f "$LR_SYNTH_OUT_DIR"/generated/ibex_tracer.v
-
 # remove the FPGA & register-based register file (because we will use the
 # latch-based one instead)
 rm -f "$LR_SYNTH_OUT_DIR"/generated/ibex_register_file_ff.v