Implement and validate RISC-V32 GNU Port

[fdesbiens]

Objective

Create a complete GCC toolchain-compatible ThreadX port targeting 32-bit RISC-V (RV32) based on the existing 64-bit port and the existing 32-bit IAR port.

Deliverables

• Create RISC-V32/GNU port directory and source set (consistent with RISC-V64/GNU structure.)
• Update all assembly source files (*.S) to correctly reflect 32-bit architecture:
• Adjust register widths
• Fix load/store instructions (lw, sw, etc.)
• Fix stack frame layout, offsets, and register save/restore logic
• Add proper compiler flags and config variables specific to RISC-V32 in the CMake / Ninja build system.
• Validate correct execution, context switching, and interrupt handling on target simulation (e.g., QEMU).

Tags

Addition, Medium Complexity

[fdesbiens]

Initial implementation in PR #490.

[fdesbiens]

PR has been merged and this will ship in the Q1 2026 release.